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Wu, H., "Performance Measurement and Security Testing of a Secure Cache Design", MSE Thesis, Electrical Engineering Department, Princeton, Princeton University, 2015  . Tagged XML BibTex
Conference Paper
Liu, F., Wu, H., Lee, R.B., "Can randomized mapping secure instruction caches from side-channel attacks?", in Proceedings of the Workshop on Hardware and Architectural Support for Security and Privacy (HASP), Portland, June 13, 2015. Tagged XML BibTex
Chen, Y., Wu, Y., Hu, S., Lee, R.B., "Impact of Dynamic Binary Translators on Security", 1st Workshop on Architectural and Microarchitectural Support for Binary Translation, Beijing, China, 21/06/2008. Abstract Tagged XML BibTex
Journal Article
Wu, H., Liu, F., Lee, R.B., "Cloud Server Benchmark Suite for Evaluating New Hardware Architectures", IEEE Computer Architecture Letters, July-Dec 2016. Abstract Tagged XML BibTex
Liu, F., Wu, H., Mai, K., Lee, R.B., "Newcache: secure cache architecture thwarting cache side channel attacks", IEEE Micro Special Issues on Security, vol. 36, issue 5, Sept/Oct 2016. Abstract Tagged XML BibTex