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"A Case for Hardware Protection of Guest VMs from Compromised Hypervisors in Cloud Computing",
in Proceedings of the Second International Workshop on Security and Privacy in Cloud Computing (SPCC), June 20-24, 2011.
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"A Domain Specific Language for Usage Management",
in Proceedings of the Eleventh ACM Workshop on Digital Rights Management, October 21, 2011.
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"Adaptive and Dynamic Network Provisioning with Network Forensics Devices",
Princeton University Department of Electrical Engineering Technical Report CE-L2011-005, Sept. 15, 2011.
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"A Framework for Testing Hardware-Software Security Architectures",
Annual Computer Security Applications Conference, Austin, Texas USA, December 6 2010.
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"A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations",
IEEE Transactions on Computing, vol. 58, issue 8, August 2009.
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"Accountability in Hosted Virtual Networks",
VISA 2009, ACM Sigcomm workshop, Barcelona, Spain, August 2009.
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"A Framework for Testing Hardware-Software Security Architectures",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-001, February 2009.
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"Accelerating the Whirlpool Hash Function Using Parallel Table Lookup and Fast Cyclical Permutation",
Proceedings of the 15th Fast Software Encryption Workshop (FSE), Lausanne, Switzerland, February 2008.
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"Advanced Bit Manipulation Instructions: Architecture, Implementation and Applications",
Department of Electrical Engineering: Princeton University, 2008 .
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"A Novel Cache Architecture with Enhanced Performance and Security",
Proceedings of the 41st. Annual IEEE/ACM International Symposium on Microarchitecture (Micro-41), pp. 88-93, December 2008.
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"A security architecture for transient trust",
Proceedings of the 2nd ACM workshop on Computer security architectures, Alexandria, Virginia, pp. 1-8, October 31.
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"Alternative application-specific processor architectures for fast arbitrary bit permutations",
International Journal of Embedded Systems, vol. 3, issue 4, pp. 219-228, 2008 .
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A Secure yet High Performance Cache Architecture,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-012, November 2007.
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A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-004, July 2007.
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Accelerating the Whirlpool Hash Function using On-Chip Lookup Tables,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-001, February 2007.
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Achieving Very Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-006, August 2007.
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"Aiding Side-channel Attacks on Cryptographic Software with Satisfiability-based Analysis",
IEEE Transactions on VLSI, vol. 15, issue 4, pp. 465-470, April 2007.
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"Architecture for a Non-Copyable Disk (NCdisk) Using a Secret-Protection (SP) SoC Solution",
Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on, Pacific Grove, CA, USA, pp. 1999-2003, 11/04/2007.
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Authority SP_CCS2007,
, 2007 .
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"A refined look at Bernstein's AES side-channel analysis",
Fast abstract in the Proceedings of the 2006 ACM Symposium on Information, Computer and Communications Security (ASIACCS 2006), Taipei, Taiwan, ACM, pp. 369, March 2006.
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"A Study of the Energy Consumption Characteristics of Cryptographic Algorithms and Security Protocols",
IEEE Transactions in Mobile Computing, vol. 5, issue 2, pp. 128-143, February 2006.
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"A Traitor Tracing Scheme Based on RSA for Fast Decryption",
Proceedings of the International Conference on Applied Cryptography and Network Security (ACNS 2005), Lecture Notes in Computer Science, vol. 3531, New York, USA, Springer-Verlag, pp. 56-74, June 7-10, 2005.
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"Architecture for Protecting Critical Secrets in Microprocessors",
Proceedings of the 32nd International Symposium on Computer Architecture (ISCA 2005), Madison, Wisconsin, USA, pp. 2-13, June 4-8, 2005.
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"Architectural Enhancements for Secure Embedded Processing",
Proceedings of the NATO Advanced Research Workshop "Security and Embedded Systems", Patras, Greeece, Aug. 2005.
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"Architectural Techniques for Accelerating Subword Permutations with Repetitions",
IEEE Transactions on Very Large Scale Integration Systems, vol. 11, issue 3, pp. 325-335, June 2003.
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