%0 Journal Article
%J IEEE Transactions on Very Large Scale Integration Systems
%D 2003
%T Architectural Techniques for Accelerating Subword Permutations with Repetitions
%A McGregor, John Patrick
%A Lee, Ruby
%K Cryptography, encryption, instruction set architecture, permutation, permutation instruction, processor architecture, subword parallelism, subword permutation
%N 3
%P 325-335
%U http://palms.ee.princeton.edu/PALMSopen/mcgregor03architectural.pdf
%V 11
%8 June 2003