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Technical Report
Multi-path Key Establishment under Byzantine Attacks in Wireless Ad Hoc Networks,
, 2008 .
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A Secure yet High Performance Cache Architecture,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-012, November 2007.
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A New Basis for Shifters in General-Purpose Processors for Existing and Advanced Bit Manipulations,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-004, July 2007.
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Accelerating the Whirlpool Hash Function using On-Chip Lookup Tables,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-001, February 2007.
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Achieving Very Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-006, August 2007.
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Checking Integrity of Untrusted Data with Few Queries,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-008, September 2007.
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Dynamic Integrity Trees for Deployable Memory Authentication,
, Department of Electrical Engineering Technical Report CE-L2007-013, November 2007.
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Decimation Tools Set,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-014, November 2007.
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Efficient Randomness Generation Techniques for Embedded Systems,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-015, December 2007.
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Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-011, November 2007.
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Memory Integrity for Secure Computing Platforms,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-003, June 2007.
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PAX: A Cryptographic Processor with Parallel Table Lookup and Wordsize Scalability,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-010, November 2007.
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Resolving Encoding Issues in Combining PAX and PLX Instruction Sets,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-007, August 2007.
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SP Processor Architecture Reference Manual,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-009, 11/21/2007.
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TEC-Tree: A Low Cost and Parallelizable Tree for Efficient Defense against Memory Replay Attacks,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-002, March 2007.
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Miscellaneous
Bastion_rl,
, 2010 .
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Authority SP_CCS2007,
, 2007 .
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UserMode SP_ISCA2005,
, 2005 .
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Thesis
"Detection and Mitigation of Security Threats in Cloud Computing",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 257, 2017 .
Abstract
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"Performance Measurement and Security Testing of a Secure Cache Design",
MSE Thesis, Electrical Engineering Department, Princeton, Princeton University, 2015 .
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"Architectures for Secure Cloud Computing Servers",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, 2013 .
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"Pwnetizer: Improving Availability in Cloud Computing Through Fast Cloning and I/O Randomization",
MSE Thesis, Computer Science Department, Princeton, NJ, Princeton University, 2013 .
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"Architecture for Data-Centric Security",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 130, 2012 .
Abstract
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"Information Leakage Due to Cache and Processor Architectures",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 135, 2012 .
Abstract
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