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"Attacking and Protecting Data Privacy in Edge-Cloud Collaborative Inference Systems",
IEEE Internet of Things Journal, 2021 .
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"New models for understanding and reasoning about speculative execution attacks",
IEEE International Symposium on High-Performance Computer Architecture (HPCA), 2021, 2021 .
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"Actionbert: leveraging user actions for semantic understanding of user interfaces",
AAAI Conference on Artificial Intelligence (AAAI), 2021 .
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"Sensitive-sample Fingerprinting of Deep Neural Networks",
IEEE Conference on Computer Vision and Pattern Recognition (CVPR): IEEE, 15/06/2019.
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"Model Inversion Attacks Against Collaborative Inference",
ACM Annual Computer Security Applications Conference (ACSAC): ACM, 12/09/2019.
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"Power-Grid Controller Anomaly Detection with Enhanced Temporal Deep Learning",
IEEE International Conference on Trust, Security and Privacy in Computing and Communications (TrustCom), 05/08/2019.
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"Machine Learning Based DDoS Attack Detection from Source Side in Cloud",
IEEE International Conference on Cyber Security and Cloud Computing (CSCloud), New York, IEEE, June 2017.
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"How secure is your cache against side-channel attacks?",
IEEE/ACM International Symposium on Microarchitecture (Micro), Boston, Massachusetts, USA, ACM, Oct 2017.
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"Cross-scale Color Image Restoration Under High Density Salt-and-pepper Noise",
IEEE International Conference on Image Processing (ICIP), Beijing, China, IEEE, 18/09/2017.
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"Information Leakage Due to Cache and Processor Architectures",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 135, 2012 .
Abstract
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"A Novel Cache Architecture with Enhanced Performance and Security",
Proceedings of the 41st. Annual IEEE/ACM International Symposium on Microarchitecture (Micro-41), pp. 88-93, December 2008.
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"Alternative application-specific processor architectures for fast arbitrary bit permutations",
International Journal of Embedded Systems, vol. 3, issue 4, pp. 219-228, 2008 .
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"Record-Replay Architecture as a General Security Framework",
IEEE International Symposium on High-Performance Computer Architecture (HPCA), Vienna, Austria, IEEE, 24/02/2018.
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"Mapping the Intel Last-Level Cache",
IACR Cryptology ePrint Archive, Report 2015/905, 2015 .
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"A Software-Hardware Architecture for Self-Protecting Data",
19th ACM conference on Computer and Communications Security, Raleigh, NC, USA, October 16-18.
Abstract
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"Architecture for Data-Centric Security",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 130, 2012 .
Abstract
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"DataMoat: Architectural Support for Self-Protecting Data",
Princeton University Department of Electrical Engineering Technical Report CE-L2011-002 (updated June 1, 2011), Feb. 10, 2011.
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"Running Untrusted Applications on Sensitive Data",
Princeton University Department of Electrical Engineering Technical Report CE-L2011-007, Nov. 16, 2011.
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"Making Security Validation as Easy as Performance Evaluation",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-005, November 2009.
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"Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors",
Journal of Signal Processing Systems, vol. 53, issue 1-2: Springer New York, pp. 145-169, 11/2008.
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"Bit Matrix Multiplication in Commodity Processors",
Proceedings of 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ‘08), July 2008.
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"SP-PAX: Hardware implementation of SP module with PAX cryptoprocessor",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-006, April 2008.
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"Design and Analysis of Password-Based Key Derivation Functions",
IEEE Transactions on Information Theory, vol. 51, no. 9, pp.3292-3297, Sept. 2005, and Proceedings of the Cryptographers' Track at the RSA Conference (CT-RSA 2005), Lecture Notes in Computer Science, vol. 3376, San Francisco, California, USA, pp. 245-261, Feb. 2005.
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"Exploration and Evaluation of PLX Floating-point Instructions and Implementations for 3D Graphics",
Proceedings of the 38th Annual Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, USA, pp. 1873-1878, Nov. 2004.
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"PLX FP: An Efficient Floating-Point Instruction Set for 3D Graphics",
Proceedings of the IEEE International Conference on Multimedia and Expo (ICME 2004), Taipei, Taiwan, pp. 137-140, June 2004.
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