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A
"Arbitrary Bit Permutations in One or Two Cycles",
Proceedings of the 14th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP 2003), The Hague, The Netherlands, pp. 237-247, June 2003.
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"A Processor Architecture Defense against Buffer Overflow Attacks",
Proceedings of the IEEE International Conference on Information Technology: Research and Education (ITRE 2003), Newark, New Jersey, USA, pp. 243-250, Aug. 2003.
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"Adding 3D Graphics Support for PLX",
Proceedings of the IEEE International Conference on Information Technology: Research and Education (ITRE 2003), Newark, New Jersey, USA, pp. 40-44, Aug. 2003.
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"Analyzing the Energy Consumption of Security Protocols",
Proceedings of the IEEE International Symposium on Low Power Electronics and Design (ISLPED 2003), Seoul, Korea, pp. 30-35, Aug. 2003.
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"Algorithm Exploration for Efficient Public-Key Security Processing on Wireless Handsets",
Proceedings of Design Automation and Test in Europe Conference and Exhibition (DATE 2002), Le Palais des Congres, Paris, France, pp. 42-46, March, 2002.
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"Architectural Enhancements for Fast Subword Permutations with Repetitions in Cryptographic Applications",
Proceedings of the International Conference on Computer Design (ICCD 2001), Austin, Texas, USA, pp. 453-461, Sept. 2001.
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"Accurate Power Macro-modeling Techniques for Complex RTL Circuits",
Proceedings of the International Conference on VLSI Design, Bangalore, India, pp. 235-241, Jan. 2001.
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