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I
"Implicit Authentication for Smartphone Security",
Information Systems Security and Privacy, vol. 576: Springer, pp. 160-176, 2015 .
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"Improving Cyber Security",
Advances in Cyber Security: Technology, Operations and Experiences: Fordham University Press, pp. 37-59, 2013 .
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"Information Leakage Due to Cache and Processor Architectures",
PhD Thesis, Electrical Engineering Department, Princeton, NJ, Princeton University, pp. 135, 2012 .
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"Impact of Dynamic Binary Translators on Security",
1st Workshop on Architectural and Microarchitectural Support for Binary Translation, Beijing, China, 21/06/2008.
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"Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors",
Proceedings of the 19th International Conference on VLSI Design (VLSID 2006), Hyderabad, India, IEEE Computer Society, pp. 299-304, January 2006.
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"Implementation Complexity of Bit Permutation Instructions",
Proceedings of the 37th Asilomar Conference on Signals, Systems, and Computers, Pacific Grove, California, Pacific Grove, California, USA, pp. 879-886, Nov. 2003.
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"Instruction Set Architecture for Multimedia Signal Processing",
Book Chapter in Vojin G. Oklobdzija ed., The Computer Engineering Handbook: CRC Press, ISBN: 0-8493-0885-2, Invited Chapter, pp. 39-1 to 39-38, 2001 .
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H
"Host-based DoS Attacks and Defense in the Cloud",
Workshop on Hardware Architectural Support for Security and Privacy, June, 2017.
Abstract
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"How secure is your cache against side-channel attacks?",
IEEE/ACM International Symposium on Microarchitecture (Micro), Boston, Massachusetts, USA, ACM, Oct 2017.
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"How to Quantify Graph De-anonymization Risks",
Springer Information Systems Security and Privacy: Springer, 2017 .
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"Hardware-Enhanced Security for Cloud",
Secure Cloud Computing , Berlin, Springer, pp. 57-76, 2014 .
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"Hardware-Assisted Application-Level Access Control",
Information Security Conference, Pisa, Italy, September 2009.
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"Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines",
Transactions on Computational Science IV, Lecture Notes in Computer Science (LNCS), issue 5340, pp. 1-22, March 2009.
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"How Bad is Suboptimal Rate Allocation?",
Proceedings of the 27th. Conference on Computer Communications, IEEE (INFOCOM ’08), pp. 951-959, April 13-18 2008.
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"Hardware-rooted Trust for Secure Key Management and Transient Trust",
ACM Conference on Computer and Communications Security (CCS) 2007, Alexandria, VA, pp. 389-400, October 2007.
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"How a Processor can Permute n bits in O(1) cycles",
Proceedings of IEEE Hot Chips 14 - A Symposium on High Performance Chips, Stanford University, USA, Aug. 2002.
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"Hewlett-Packard Precision Architecture: the Processor",
HP Journal, vol. 37, issue 8, pp. 19, 08/1986.
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G
"General-purpose FPGA Platform for Efficient Encryption and Hashing",
in Proceedings of the Application-specific Systems, Architectures and Processors conference, ASAP, July 7-9, 2010.
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F
"Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors",
Journal of Signal Processing Systems, vol. 53, issue 1-2: Springer New York, pp. 145-169, 11/2008.
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"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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"Framework for Design Validation of Security Architectures",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-013, November 2008.
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Fast Bit Matrix Multiplication in Commodity Microprocessors,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-011, November 2007.
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"Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions",
Proceedings of the IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 65-72, 11/09/2006.
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"Fast Parallel Table Lookups to Accelerate Symmetric-Key Cryptography",
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC 2005), Las Vegas, Nevada, USA, pp. 526-531, April 4-6, 2005.
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"Fast Software-Based Attacks on Secure ID",
Proceedings of the 11th International Workshop on Fast Software Encryption (FSE 2004), Delhi, India, pp. 454-471, Feb. 2004.
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