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Conference Paper
"Tuning Instruction Customisation for Reconfigurable System-on-Chip",
Proceedings of the 22nd IEEE International SOC Conference, Sept. 9-11, 2009.
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"Accelerating the Whirlpool Hash Function Using Parallel Table Lookup and Fast Cyclical Permutation",
Proceedings of the 15th Fast Software Encryption Workshop (FSE), Lausanne, Switzerland, February 2008.
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"A Novel Cache Architecture with Enhanced Performance and Security",
Proceedings of the 41st. Annual IEEE/ACM International Symposium on Microarchitecture (Micro-41), pp. 88-93, December 2008.
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"Bit Matrix Multiplication in Commodity Processors",
Proceedings of 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ‘08), July 2008.
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"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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"How Bad is Suboptimal Rate Allocation?",
Proceedings of the 27th. Conference on Computer Communications, IEEE (INFOCOM ’08), pp. 951-959, April 13-18 2008.
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"Impact of Dynamic Binary Translators on Security",
1st Workshop on Architectural and Microarchitectural Support for Binary Translation, Beijing, China, 21/06/2008.
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"The Reduced Address Space for Application Memory Authentication",
Proceedings of the 11th Information Security Conference (ISC'08), September 2008.
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"Architecture for a Non-Copyable Disk (NCdisk) Using a Secret-Protection (SP) SoC Solution",
Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on, Pacific Grove, CA, USA, pp. 1999-2003, 11/04/2007.
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"Hardware-rooted Trust for Secure Key Management and Transient Trust",
ACM Conference on Computer and Communications Security (CCS) 2007, Alexandria, VA, pp. 389-400, October 2007.
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"Mutual Anonymous Communications: A New Covert Channel Based on Splitting Tree MAC",
IEEE Infocom 2007, pp. 2531-2535, May 6-12, 2007.
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"New Cache Designs for Thwarting Software Cache-based Side Channel Attacks",
Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), San Diego, CA, pp. 494 - 505, June 2007.
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"Performing Advanced Bit Manipulations Efficiently in General-Purpose Processors",
Proceedings of the 18th IEEE Symposium on Computer Arithmetic (ARITH-18), Montpellier, France, pp. 251-260, June 2007.
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"Re-examining Probabilistic Versus Deterministic Key Management",
Proceedings of the 2007 IEEE International Symposium on Information Theory (ISIT), Nice, France, pp. 2586-2590, June 2007.
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"Secure Key Management Architecture Against Sensor-node Fabrication Attacks",
IEEE GlobeCom 2007, Washington, DC, November 2007.
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"TEC-Tree: A Low Cost, Parallelizable Tree for Efficient Defense against Memory Replay Attacks",
Proc. Workshop on Cryptographic Hardware and Embedded Systems (CHES 2007), Vienna, Austria, pp. 289-302, September 2007.
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"Covert and Side Channels due to Processor Architecture",
Proceedings of the 22nd Annual Computer Security Applications Conference (ACSAC'06), pp. 473-482, December 2006.
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"Fast Bit Compression and Expansion with Parallel Extract and Parallel Deposit Instructions",
Proceedings of the IEEE 17th International Conference on Application-Specific Systems, Architectures and Processors (ASAP), pp. 65-72, 11/09/2006.
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"Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors",
Proceedings of the 19th International Conference on VLSI Design (VLSID 2006), Hyderabad, India, IEEE Computer Society, pp. 299-304, January 2006.
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"Scope of DDoS Countermeasures: Taxonomy of Proposed Solutions and Design Goals for Real-World Deployment",
8th International Symposium on Systems and Information Security (SSI'2006), November 2006.
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"Satisfiability-based Framework for Enabling Side-channel Attacks on Cryptographic Software",
Proceedings of the Conference on Design, Automation and Test in Europe (DATE 2006), Munich, Germany, pp. 18-23, March 2006.
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"A Traitor Tracing Scheme Based on RSA for Fast Decryption",
Proceedings of the International Conference on Applied Cryptography and Network Security (ACNS 2005), Lecture Notes in Computer Science, vol. 3531, New York, USA, Springer-Verlag, pp. 56-74, June 7-10, 2005.
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"Architecture for Protecting Critical Secrets in Microprocessors",
Proceedings of the 32nd International Symposium on Computer Architecture (ISCA 2005), Madison, Wisconsin, USA, pp. 2-13, June 4-8, 2005.
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"Capacity Estimation of Non-Synchronous Covert Channels",
Proceedings of the 2nd International Workshop on Security in Distributed Computing Systems (SDCS 2005), Columbus, OH, USA, pp. 170-176, June 6-9, 2005.
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"Fast Parallel Table Lookups to Accelerate Symmetric-Key Cryptography",
Proceedings of the International Conference on Information Technology: Coding and Computing (ITCC 2005), Las Vegas, Nevada, USA, pp. 526-531, April 4-6, 2005.
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