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Filters: author is Ruby B. Lee [Clear All Filters]
A
"Disruptive Prefetching: Impact on Side-Channel Attacks and Cache Designs",
Proceedings of the 8th ACM International Systems and Storage Conference, Haifa, Israel, May 2015.
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B
"A 32kB Secure Cache Memory with Dynamic Replacement Mapping in 65nm bulk CMOS",
IEEE Asian Solid-States Circuit Conference (A-SSCC), Xiamen, China, November 2015.
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C
"Tuning Instruction Customisation for Reconfigurable System-on-Chip",
Proceedings of the 22nd IEEE International SOC Conference, Sept. 9-11, 2009.
Abstract
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D
"Characterizing Hypervisor Vulnerabilities in Cloud Computing Servers",
in Proceedings of the Workshop on Security in Cloud Computing (SCC), May 2013.
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"Scalable Architectural Support for Trusted Software",
The 16th IEEE International Symposium on High-Performance Computer Architecture (HPCA), Bangalore, India, Jan 9-14 2010.
Abstract
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"Processor-based Tailored Attestation",
Princeton University Department of Electrical Engineering Technical Report CE-L2010-005, Nov 15, 2010., 2010 .
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"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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"The Reduced Address Space for Application Memory Authentication",
Proceedings of the 11th Information Security Conference (ISC'08), September 2008.
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E
"NoHype: Virtualized cloud infrastructure without the virtualization",
in Proceedings of the International Symposium on Computer Architecture, ISCA, June 19-23 2010.
Abstract
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"Accountability in Hosted Virtual Networks",
VISA 2009, ACM Sigcomm workshop, Barcelona, Spain, August 2009.
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F
"Newcache: secure cache architecture thwarting cache side channel attacks",
IEEE Micro Special Issues on Security, vol. 36, issue 5, Sept/Oct 2016.
Abstract
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"Last-Level Cache Side-Channel Attacks are Practical",
Proceedings of IEEE Symposium on Security and Privacy, San Jose, pp. 605-622, May 2015.
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"Can randomized mapping secure instruction caches from side-channel attacks?",
in Proceedings of the Workshop on Hardware and Architectural Support for Security and Privacy (HASP), Portland, June 13, 2015.
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"Random Fill Cache Architecture",
Proceedings of the 47th Annual IEEE/ACM International Symposium on Microarchitecture (Micro-47), Cambridge, pp. 203-215, December 2014.
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"Security Testing of a Secure Cache Design",
in Proceedings of the Workshop on Hardware and Architectural Support for Security and Privacy (HASP), June 24, 2013.
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"Adaptive and Dynamic Network Provisioning with Network Forensics Devices",
Princeton University Department of Electrical Engineering Technical Report CE-L2011-005, Sept. 15, 2011.
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G
"Smartphone Impostor Detection with Behavioral Data Privacy and Minimalist Hardware Support",
TinyML Research Symposium, 2021 .
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"SoK: Hardware Defenses Against Speculative Execution Attacks",
IEEE International Symposium on Secure and Private Execution Environment Design, 2021 .
Abstract
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"Butterfly and inverse Butterfly nets integration on Altera NioS-ii embedded processor",
44th IEEE Asilomar Conference on Signal, Systems and Computers, Pacific Grove, California, USA, November 2010.
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"Virtualization of a Processor-based Crypto-Protection Mechanism and Integration within a Separation Kernel Architecture",
Princeton University Department of Electrical Engineering Technical Report CE-L2006-006, November 2006.
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H
"Cloud Server Benchmark Suite for Evaluating New Hardware Architectures",
IEEE Computer Architecture Letters, July-Dec 2016.
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J
"Cyber Defenses for Physical Attacks and Insider Threats in Cloud",
Proceedings of the ACM Symposium on Information, Computer and Communications Security (AsiaCCS), June 2014.
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"Hardware-Enhanced Security for Cloud",
Secure Cloud Computing , Berlin, Springer, pp. 57-76, 2014 .
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"BitDeposit: Deterring Attacks and Abuses of Cloud Computing Services Through Economic Measures",
in Proceedings of the Workshop on Assured Cloud Computing (ACC), May 2013.
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"Architectural Support for Hypervisor-Secure Virtualization",
in Proceedings of the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 3–7, 2012.
Abstract
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