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Filters: author is Ruby B. Lee [Clear All Filters]
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"Physical Attack Protection with Human-Secure Virtualization in Data Centers",
Workshop on Open Resilient human-aware Cyber-physical Systems (WORCS), June 25, 2012.
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"Rapid Single-Chip Secure Processor Prototyping on OpenSPARC FPGA Platform",
in Proceedings of the Rapid System Prototyping Symposium (RSP), May 24-27, 2011.
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"A Case for Hardware Protection of Guest VMs from Compromised Hypervisors in Cloud Computing",
in Proceedings of the Second International Workshop on Security and Privacy in Cloud Computing (SPCC), June 20-24, 2011.
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"Eliminating the Hypervisor Attack Surface for a More Secure Cloud",
in Proceedings of the Conference on Computer and Communications Security (CCS), Oct. 17-21, 2011.
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"Trust but Verify: Trust Evidence for Hypervisor-Secure Virtualization",
Princeton University Department of Electrical Engineering Technical Report CE-L2011-008, Nov. 16, 2011.
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"General-purpose FPGA Platform for Efficient Encryption and Hashing",
in Proceedings of the Application-specific Systems, Architectures and Processors conference, ASAP, July 7-9, 2010.
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"A Framework for Testing Hardware-Software Security Architectures",
Annual Computer Security Applications Conference, Austin, Texas USA, December 6 2010.
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"Evaluation of OpenSPARC FPGA Platform as a Security and Performance Research Platform",
Princeton University Department of Electrical Engineering Technical Report CE-L2010-002, Sept. 6, 2010.
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"A Framework for Testing Hardware-Software Security Architectures",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-001, February 2009.
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"SP Reference Manual Addendum -- Secure Stacks for TSMs and Emulation of SP Interrupt Protection",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-006, August 2009.
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"Framework for Design Validation of Security Architectures",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-013, November 2008.
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"SecureCore Prototype/Demo Manual",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-009, August 2008.
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"SP Processor Architecture Reference Manual",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-008, August 2008.
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"Maya: A Novel Block Encryption Function",
International Workshop on Coding and Cryptography (WCC 2009), Ullensvang, Norway, May 2009.
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"Hewlett-Packard Precision Architecture: the Processor",
HP Journal, vol. 37, issue 8, pp. 19, 08/1986.
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"Using Moving Target Defense for Secure Hardware Design",
Princeton University Department of Electrical Engineering Technical Report CE-L2016-002, 2016 .
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"Improving Cyber Security",
Advances in Cyber Security: Technology, Operations and Experiences: Fordham University Press, pp. 37-59, 2013 .
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"Processor Accelerator for AES",
Proceedings of the 2010 IEEE 8th Symposium on Application Specific Processors, Anaheim, CA, USA, pp. 71-76, June 13-14 2010.
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"Hardware Mechanisms for Memory Authentication: A Survey of Existing Techniques and Engines",
Transactions on Computational Science IV, Lecture Notes in Computer Science (LNCS), issue 5340, pp. 1-22, March 2009.
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"Precision Architecture",
IEEE computer, vol. 22, issue 1, pp. 14, 01/1989.
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"Design, Implementation and Verification of Cloud Architecture for Monitoring a Virtual Machine’s Security Health",
IEEE Transactions on Computers, vol. 67, issue 6: IEEE, 06/2018.
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"DoS Attacks on Your Memory in the Cloud",
ACM Asia Conference on Computer and Communications Security, Abu Dhabi, April, 2017.
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"Host-based DoS Attacks and Defense in the Cloud",
Workshop on Hardware Architectural Support for Security and Privacy, June, 2017.
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"CloudShelter: Protecting Virtual Machines’ Memory Resource Availability in Cloud Computing",
IEEE International Conference on Computer Design (ICCD), Boston, IEEE, 05/11/2017.
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"CloudRadar: A Real-time Side-channel Attack Detection System in Clouds",
Research in Attacks, Intrusion and Defense, September 2016.
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