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2007
Resolving Encoding Issues in Combining PAX and PLX Instruction Sets,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-007, August 2007.
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"Aiding Side-channel Attacks on Cryptographic Software with Satisfiability-based Analysis",
IEEE Transactions on VLSI, vol. 15, issue 4, pp. 465-470, April 2007.
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SP Processor Architecture Reference Manual,
, Princeton University Department of Electrical Engineering Technical Report CE-L2007-009, 11/21/2007.
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"Architecture for a Non-Copyable Disk (NCdisk) Using a Secret-Protection (SP) SoC Solution",
Signals, Systems and Computers, 2007. ACSSC 2007. Conference Record of the Forty-First Asilomar Conference on, Pacific Grove, CA, USA, pp. 1999-2003, 11/04/2007.
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Authority SP_CCS2007,
, 2007 .
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2008
"The Reduced Address Space for Application Memory Authentication",
Proceedings of the 11th Information Security Conference (ISC'08), September 2008.
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"Framework for Design Validation of Security Architectures",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-013, November 2008.
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"Stability and Benefits of Suboptimal Utility Maximization",
submitted to IEEE Transactions on Networking, Nov. 4.
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"Bit Matrix Multiplication in Commodity Processors",
Proceedings of 19th IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP ‘08), July 2008.
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"Accelerating the Whirlpool Hash Function Using Parallel Table Lookup and Fast Cyclical Permutation",
Proceedings of the 15th Fast Software Encryption Workshop (FSE), Lausanne, Switzerland, February 2008.
Abstract
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"A Novel Cache Architecture with Enhanced Performance and Security",
Proceedings of the 41st. Annual IEEE/ACM International Symposium on Microarchitecture (Micro-41), pp. 88-93, December 2008.
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"Forward-Secure Content Distribution to Reconfigurable Hardware",
Proceedings of the Int'l Conference on ReConFigurable Computing and FPGAs (Reconfig'08), December 2008.
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"SecureCore Prototype/Demo Manual",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-009, August 2008.
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"SP Processor Architecture Reference Manual",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-008, August 2008.
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"SP-PAX: Hardware implementation of SP module with PAX cryptoprocessor",
Princeton University Department of Electrical Engineering Technical Report CE-L2008-006, April 2008.
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"How Bad is Suboptimal Rate Allocation?",
Proceedings of the 27th. Conference on Computer Communications, IEEE (INFOCOM ’08), pp. 951-959, April 13-18 2008.
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"Impact of Dynamic Binary Translators on Security",
1st Workshop on Architectural and Microarchitectural Support for Binary Translation, Beijing, China, 21/06/2008.
Abstract
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"Fast Bit Gather, Bit Scatter and Bit Permutation Instructions for Commodity Microprocessors",
Journal of Signal Processing Systems, vol. 53, issue 1-2: Springer New York, pp. 145-169, 11/2008.
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"Alternative application-specific processor architectures for fast arbitrary bit permutations",
International Journal of Embedded Systems, vol. 3, issue 4, pp. 219-228, 2008 .
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Multi-path Key Establishment under Byzantine Attacks in Wireless Ad Hoc Networks,
, 2008 .
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2009
"Hardware-Assisted Application-Level Access Control",
Information Security Conference, Pisa, Italy, September 2009.
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"Tuning Instruction Customisation for Reconfigurable System-on-Chip",
Proceedings of the 22nd IEEE International SOC Conference, Sept. 9-11, 2009.
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"Making Security Validation as Easy as Performance Evaluation",
Princeton University Department of Electrical Engineering Technical Report CE-L2009-005, November 2009.
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"Multi-path Key Establishment Against REM Attacks in Wireless Ad Hoc Networks",
IEEE Global Communications Conference (GLOBECOM 2009), Honolulu, Hawaii, USA, Nov/Dec 2009.
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